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xnorgate

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abhijitwankhede4141 / xnor-gate-cadence-project

CMOS XnOR Gate design using Cadence Virtuoso including schematic design, simulation and layout verification (DRC, LVS REX).

layout schematic rcx symbol transient-analysis lvs drc cmosdesign xnorgate cadencevirtuoso

Updated Mar 15, 2026

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