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Merge pull request #289 from Solanasol233/typos
docs: fix some typos in comment
2 parents a2be6f1 + d885f55 commit b4670d6

2 files changed

Lines changed: 4 additions & 4 deletions

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src/backends/kimchi/mod.rs

Lines changed: 2 additions & 2 deletions
Original file line numberDiff line numberDiff line change
@@ -378,15 +378,15 @@ impl Backend for KimchiVesta {
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);
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Err(err)?;
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} else {
381-
Err(Error::new("contraint-finalization", ErrorKind::UnexpectedError("there's a bug in the circuit_writer, some cellvar does not end up being a cellvar in the circuit!"), Span::default()))?;
381+
Err(Error::new("constraint-finalization", ErrorKind::UnexpectedError("there's a bug in the circuit_writer, some cellvar does not end up being a cellvar in the circuit!"), Span::default()))?;
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}
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}
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}
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386386
// kimchi hack
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if self.gates.len() <= 2 {
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Err(Error::new(
389-
"contraint-finalization",
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"constraint-finalization",
390390
ErrorKind::UnexpectedError(
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"The circuit is either too small or does not constrain anything, too few gates create in the R1CS",
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),

src/backends/kimchi/prover.rs

Lines changed: 2 additions & 2 deletions
Original file line numberDiff line numberDiff line change
@@ -329,7 +329,7 @@ mod tests {
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.unwrap();
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331331
// first fradulent attempt: modifying one of the public output values
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// attemp to modify the output value
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// attempt to modify the output value
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let invalid_output = VestaField::from(output_val + 1);
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full_public_inputs[1] = invalid_output;
335335

@@ -352,7 +352,7 @@ mod tests {
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_ => panic!("Expected DisconnectedWires error"),
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}
354354

355-
// second fradulent attempt: sync the value for all the output vars in all the gates
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// second fraudulent attempt: sync the value for all the output vars in all the gates
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witness[0][result_row] = invalid_output;
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let result = prover_index.index.verify(&witness, &full_public_inputs);

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