indexcodec: Refine the cmov codegen workaround for gcc

gcc has the same problem as clang, but it can't be solved using an
attribute: gcc doesn't support __builtin_unpredictable and
__builtin_expect_with_probability does not affect the codegen here.

Additionally, some versions of gcc (gcc-16+, possibly earlier versions)
can fuse two reads from edgefifo[] for a/b into a single 64-bit load,
but keep separate stores into edgefifo[]. This breaks store to load
forwarding, as it usually requires that a load is covered by a single
store, which results in further significant performance loss.

Both of these can be fixed with an asm barrier: cf is forced to be
materialized in a register which prevents folding it into the ternary,
at which point the select is simple and emits cmov; the +r restriction
on a also blocks fusing the loads into a single load.

While clang could technically keep using the attribute workaround, the
same workaround appears to work fine for it, so for simplicity we use
the same asm barrier for both compilers for now.

This makes index decoding ~10-12% faster for gcc14/15 and ~19% faster
for gcc16.

Author: zeux

src/indexcodec.cpp

@@ -7,11 +7,6 @@
 // This work is based on:
 // Fabian Giesen. Simple lossless index buffer compression & follow-up. 2013
 // Conor Stokes. Vertex Cache Optimised Index Buffer Compression. 2014
-
-#ifndef __has_builtin
-#define __has_builtin(x) 0
-#endif
-
 namespace meshopt
 {
 
@@ -450,13 +445,15 @@ int meshopt_decodeIndexBuffer(void* destination, size_t index_count, size_t inde
 				// fifo reads are wrapped around 16 entry buffer
 				unsigned int cf = vertexfifo[(vertexfifooffset - 1 - fec) & 15];
 
-				// clang needs the branch annotation because cf[] comes from "memory" and x86-cmov-conversion pass removes cmov otherwise
-#if defined(__clang__) && __has_builtin(__builtin_unpredictable)
-				c = __builtin_unpredictable(fec == 0) ? next : cf;
-#else
-				c = (fec == 0) ? next : cf;
+#if (defined(__GNUC__) || defined(__clang__)) && (defined(__x86_64__) || defined(__aarch64__))
+				// on clang, x86-cmov-conversion pass emits a branch since cf is a load from memory; asm barrier defeats this
+				// this can be fixed with __builtin_unpredictable, but gcc doesn't support it and has a similar problem due to if-conversion
+				// additionally, gcc can fuse a/b into one 64-bit load but use 32-bit edgefifo[] stores, which breaks load store forwarding
+				__asm__("" : "+r"(a) : "r"(cf));
 #endif
 
+				c = (fec == 0) ? next : cf;
+
 				int fec0 = fec == 0;
 				next += fec0;