We read every piece of feedback, and take your input very seriously.
To see all available qualifiers, see our documentation.
1 parent 6e2dd7d commit 17e9714Copy full SHA for 17e9714
2 files changed
src/matrix_panel_fpga.hpp
@@ -44,12 +44,6 @@ class MatrixPanel_FPGA_SPI {
44
init_fpga_ready_gpio_();
45
46
start_worker();
47
- // Reset the fpga state
48
- gpio_set_direction((gpio_num_t)m_cfg.gpio.fpga_reset, GPIO_MODE_OUTPUT);
49
- gpio_set_level((gpio_num_t)m_cfg.gpio.fpga_reset, 0); // LOW
50
- gpio_set_level((gpio_num_t)m_cfg.gpio.fpga_reset, 1); // HIGH
51
52
-
53
while (!initialized)
54
;
55
if (!initialized) {
src/matrix_panel_fpga_config.hpp
@@ -17,7 +17,6 @@
17
#define SPI_MOSI_PIN_DEFAULT 2
18
#define SPI_CE_PIN_DEFAULT 15
19
20
-#define FPGA_RESET_PIN_DEFAULT 4
21
#define FPGA_READY_PIN_DEFAULT -1
22
23
// Adapted from
@@ -86,7 +85,7 @@ struct FPGA_SPI_CFG {
86
85
87
// GPIO Mapping
88
struct spi_pins {
89
- int8_t ce, clk, mosi, fpga_reset, fpga_ready;
+ int8_t ce, clk, mosi, fpga_ready;
90
} gpio;
91
92
// SPI clock speed
@@ -102,8 +101,7 @@ struct FPGA_SPI_CFG {
102
101
uint16_t _w = MATRIX_WIDTH, uint16_t _h = MATRIX_HEIGHT,
103
uint16_t _chain = CHAIN_LENGTH,
104
spi_pins _pinmap = {SPI_CE_PIN_DEFAULT, SPI_CLK_PIN_DEFAULT,
105
- SPI_MOSI_PIN_DEFAULT, FPGA_RESET_PIN_DEFAULT,
106
- FPGA_READY_PIN_DEFAULT},
+ SPI_MOSI_PIN_DEFAULT, FPGA_READY_PIN_DEFAULT},
107
clk_speed _spispeed = HZ_8M, uint16_t _min_refresh_rate = 60,
108
uint8_t _pixel_color_depth_bits = PIXEL_COLOR_DEPTH_BITS_DEFAULT)
109
: mx_width(_w), mx_height(_h), chain_length(_chain), gpio(_pinmap),
0 commit comments