Skip to content
Change the repository type filter

All

    Repositories list

    • End-to-End Mixed Precision Neural Network Co-Exploration Framework for Edge AI
      Python
      011123Updated Jun 15, 2026Jun 15, 2026
    • MiCo-SW

      Public
      MiCo Baremetal Software Project Template
      C
      0000Updated Jun 15, 2026Jun 15, 2026
    • MiCo-Lib

      Public
      C Library of MiCo
      C
      0003Updated Jun 15, 2026Jun 15, 2026
    • VexiiRiscv with MiCo Ext.
      Scala
      MIT License
      55200Updated Jun 10, 2026Jun 10, 2026
    • SystemVerilog
      Other
      0400Updated May 26, 2026May 26, 2026
    • BNRV

      Public
      Lightweight BitNet Acceleration on RISC-V via Custom Insturctions (ICCD '25)
      C
      2800Updated Apr 22, 2026Apr 22, 2026
    • LLM-powered automated framework for Verilog hardware design verification and repair
      C
      MIT License
      1600Updated Mar 17, 2026Mar 17, 2026
    • Pure Python implementation of RNS-CKKS and FHEW homomorphic encryption schemes
      Python
      0100Updated Jan 26, 2026Jan 26, 2026
    • bitfusion

      Public
      Simulator for BitFusion
      Python
      26000Updated Jan 14, 2026Jan 14, 2026
    • An Agile RISC-V SoC Design Framework with in-order cores, out-of-order cores, accelerators, and more
      Scala
      BSD 3-Clause "New" or "Revised" License
      879000Updated Jan 8, 2026Jan 8, 2026
    • This is a python repo for flattening Verilog
      Verilog
      52010Updated Dec 19, 2025Dec 19, 2025
    • Verilog
      Apache License 2.0
      0500Updated Dec 2, 2025Dec 2, 2025
    • Python
      MIT License
      01100Updated Nov 27, 2025Nov 27, 2025
    • Tcl
      0000Updated Nov 18, 2025Nov 18, 2025
    • MiCoSocSW

      Public
      Pre-built ELFs for MiCoSoc
      C
      0000Updated Nov 17, 2025Nov 17, 2025
    • Python
      0000Updated Sep 1, 2025Sep 1, 2025
    • C
      MIT License
      0200Updated Apr 30, 2025Apr 30, 2025
    • FEHE

      Public
      Python
      0000Updated Mar 25, 2025Mar 25, 2025
    • SPaDE for VexRiscv
      Python
      MIT License
      0800Updated Jan 7, 2025Jan 7, 2025
    • Tool for converting PyTorch models into raw C codes with minimal dependency and some performance optimizations.
      C
      9000Updated Dec 9, 2024Dec 9, 2024
    • Rocket Chip Generator
      Scala
      Other
      1.3k000Updated Dec 3, 2024Dec 3, 2024
    • MACO

      Public
      Python
      0310Updated Sep 10, 2024Sep 10, 2024
    • Verilog
      1000Updated Aug 13, 2024Aug 13, 2024
    • VexRiscv

      Public
      A FPGA friendly 32 bit RISC-V CPU implementation (Extended with DSE supports)
      Assembly
      MIT License
      504000Updated Jan 24, 2024Jan 24, 2024
    ProTip! When viewing an organization's repositories, you can use the props. filter to filter by custom property.